Product Summary

The XC95144-15PQG100C is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. The XC95144-15PQG100C is comprised of eight 36V18 Function Blocks, providing 3,200 usable gates with propagation delays of 7.5 ns.

Parametrics

XC95144-15PQG100C absolute maximum ratings: (1)VCC Supply voltage relative to GND: –0.5V to 7.0V; (2)VIN Input voltage relative to GND: –0.5V to VCC + 0.5V; (3)VTS Voltage applied to 3-state output: –0.5V to VCC + 0.5V; (4)TSTG Storage temperature (ambient): –65℃ to +150℃; (5)TJ Junction temperature: +150℃.

Features

XC95144-15PQG100C features: (1)7.5 ns pin-to-pin logic delays on all pins; (2)fCNT to 111 MHz; (3)144 macrocells with 3,200 usable gates; (4)Up to 133 user I/O pins; (5)5V in-system programmable; (6)Enhanced pin-locking architecture; (7)Flexible 36V18 Function Block (FB); (8)Extensive IEEE Std 1149.1 boundary-scan (JTAG) support; (9)Programmable power reduction mode in each macrocell; (10)Slew rate control on individual outputs; (11)User programmable ground pin capability; (12)Extended pattern security features for design protection; (13)High-drive 24mA outputs; (14)3.3V or 5V I/O capability; (15)Advanced CMOS 5V Fast FLASH technology; (16)Supports parallel programming of more than one XC9500 concurrently; (17)Available in 100-pin PQFP, 100-pin TQFP, and 160-pin PQFP packages.

Diagrams

XC95144-15PQG100C blcok diagram

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XC95144-15PQG100C
XC95144-15PQG100C


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IC REG BUCK ADJ 1A DL 10MSOP

Data Sheet

0-1: $1.19
1-10: $1.07
10-25: $0.96
25-100: $0.86
100-250: $0.77
250-500: $0.67